Multiprocessing system using indirect addressing to access respective local semaphore registers bits for setting the bit or branching if the bit is set
In a tightly coupled communication scheme based on a common shared resource circuit and adapted particularly to a multiprocessing system having 2N CPUs, a method of accessing data in a shared resource register. An instruction issue circuit reads a semaphore bit in a local control circuit. If the bit...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Schreiben Sie den ersten Kommentar!