Multiprocessing system using indirect addressing to access respective local semaphore registers bits for setting the bit or branching if the bit is set

In a tightly coupled communication scheme based on a common shared resource circuit and adapted particularly to a multiprocessing system having 2N CPUs, a method of accessing data in a shared resource register. An instruction issue circuit reads a semaphore bit in a local control circuit. If the bit is clear, the next instruction issues. If, however, the bit is set, a branch is taken and instructions are executed starting at the branch address.