Memory compiler with multiple selectable core elements

Methods and devices for efficiently using substrate space to form memory devices on integrated circuits, and in particular, in application specific integrated circuits. More particularly, a shared decoder and control logic are used for selectively accessing and addressing plural types of memory (e.g., RAM and ROM cells). Further, each memory cell of a memory array is programmed as a particular type of memory cell during circuit layout design. Therefore, specific rows, columns, or single bits of the memory cell array can be designated as specific types of memory.