Self-initializing circuit link

A circuit link, and method for using link, for self initializing any device operatively connected to the link. An input signal is split into two portions, one of which is delayed so that the undelayed signal can transverse the circuit link before the delayed signal. A pair of quadrature splitters are operatively connected to one another to split and combine the undelayed and delayed signals in their turns, and recombine them in their turns, in a manner effective to cause one of the circuit link's outputs to be nonzero responsive to the delayed signal, and zero responsive to the undelayed signal, with the opposite result on the other circuit output. The undelayed signal is thus available to initialize any device requiring initialization, and the delayed signal, unperturbed by any such device, is thus available for use as the circuit link's ultimate output. The circuit is especially useful with frequency selective limiters (FSL's), which are commonly used as channelizers in multichannel communication systems, and which are ineffective before initialization.