System and method for preserving instruction granularity when translating program code from a computer having a first architecture to a computer having a second reduced architecture during the occurrence of interrupts due to asynchronous events

A computer program of complex instruction set code (CISC) is translated to produce a program of reduced instruction set code (RISC). Each CISC instruction is translated into a sequence of RISC instructions. The sequence includes in order four groups of instructions. The first group includes instruct...

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Bibliographische Detailangaben

Hauptverfasser:	ROBINSON, SCOTT G, SITES, RICHARD L
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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