Two-level cache memory system

A two-level cache memory system for use in a computer system including two primary cache memories, one for storing instructions and one for storing data. The system also includes a secondary cache memory for storing both instructions and data. The primary and secondary caches each employ their own s...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: LAYMAN, TIMOTHY P, FARMWALD, P. MICHAEL, ROBERTS, ALLEN W, TAYLOR, GEORGE S, NGO, HUY X
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A two-level cache memory system for use in a computer system including two primary cache memories, one for storing instructions and one for storing data. The system also includes a secondary cache memory for storing both instructions and data. The primary and secondary caches each employ their own separate tag directory. The primary caches use a virtual addressing scheme employing both virtual tags and virtual addresses. The secondary cache employs a hybrid addressing scheme which uses virtual tags and partial physical addresses. The primary and secondary caches operate in parallel unless the larger and slower secondary cache is busy performing a previous operation. Only if a "miss" is encountered in both the primary and secondary caches does the system processor access the main memory.