Microprocessor system with multiple interrupts masked for use in electronic control or monitoring of various solid-state products

A microprocessor used in solid state products has multiple interrupts and a single read only memory (ROM) masked for two or more product programs. The logic state of an input pin is set to select the appropriate program. If there is an error in one program or it becomes obsolete, the microprocessor does not have to be scrapped, but can be used to execute the other (another) product program. Separate interrupt selection routines for each interrupt, addressed from a common interrupt vector table, direct program execution to an interrupt branch table for the product indicated by the input pin. The product branch table contains addresses for the interrupt service routines for the selected product. The product programs are first separately linked with the interrupt branch table for the corresponding product. The common interrupt vector table and the interrupt selection routines are then linked with one product program and its interrupt branch table, before final linkage of all software components to avoid conflicts should a program be changed.