Output circuit of semiconductor memory device

An output circuit for providing data read from a memory cell is disclosed. When a power source is turned on, initial value data set in a register circuit is read and then latched in comparison circuits. The data latched in the comparison circuits are applied through NOR circuits to a plurality of transistors, so that the transistors corresponding in number to the initial value data are rendered conductive. An output signal is fed back from a common output terminal of the respective transistors to the comparison circuits, so that the respective comparison circuits compare between respective threshold values and the output signal. Thus, a determination is made as to whether the gradient of leading edges of waveforms of the output signal is sharp or gradual. If the gradient is gradual, the number of transistors becoming conductive increases, whereas if the gradient is sharp, the number of such transistors decreases. This makes it possible to suppress ringing included in the output signal waveforms independently of the magnitude of a load connected to the output terminal.