Apparatus for intelligent reduction of worst case power in memory systems

A memory system is implemented by an array of large scale integrated dynamic random access memory elements. The memory elements are of a type that permit data way word storage on a page basis, each page being defined on a row boundary. Discovering that excess power consumption by the memory can result from successive memory operations made back-to-back to different page locations, the present invention provides counter means to count each immediately successive different page memory operations so that, when that count matches a maximum count, memory operations are stalled for a period of time.