Jagged-edge killer circuit for three-dimensional display
A jagged-edge killer circuit for a three-dimensional display, comprises a frame buffer for storing data of each pixel on the display screen by a pixel unit; a Z-buffer for storing distance data in a depth direction of a picture by a sub-pixel unit into which the pixel as a storage unit of the frame...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A jagged-edge killer circuit for a three-dimensional display, comprises a frame buffer for storing data of each pixel on the display screen by a pixel unit; a Z-buffer for storing distance data in a depth direction of a picture by a sub-pixel unit into which the pixel as a storage unit of the frame buffer is subdivided in a predetermined number; a picture data buffer for storing picture data by the sub-pixel unit; an element for comparing the distance data stored in the Z-buffer with new distance data in the depth direction about each new sub-pixel into which new pixel is subdivided in the predetermined number when picture data of said new pixel are written in the picture data buffer; a first element for renewing storage contents of the picture data buffer about only sub-pixel having nearer distance in the depth direction within the sub-pixels subdivided from the new pixel into the predetermined number on the basis of a comparison result of the comparing element; a second element for renewing storage contents of the Z-buffer by the new distance data of the sub-pixels having the predetermined number corresponding to the new pixel; and an element for generating picture data of the pixel unit in the frame buffer by performing an arithmetical mean of the picture data of the sub-pixel unit having the predetermined number in the picture data buffer. |
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