Information processing device

An information processing device includes a random access memory storing parallel program data, a counter generating a first address supplied to the random access memory and a second address, and a selector for converting the parallel program data read out from the random access memory in accordance with the first address into serial program data when the second address generated by the address generator is applied to the counter. Further, the information processing device includes a circuit for converting the serial program data into a cyclic code signal and outputting the cyclic code signal to an external device in which the cyclic code signal is compared with a reference cyclic signal formed on the basis of correct program data corresponding to the program data stored in the random access memory.