CMOS static memory

A CMOS static memory includes a memory cell array having a plurality of memory cells two-dimensionally arranged in word and bit line directions, and peripheral circuits including n-type MOSFETs for performing a write/read operation for the memory cell. The memory cell includes a flip-flop circuit constituted by a pair of pull-down n-type MOSFETs and a pair of pull-up resistor elements, and a pair of transmission gate n-type MOSFETs. Each of a pair of pull-down n-type MOSFETs and the pair of transmission gate n-type MOSFETs have a gate oxide film having a thickness and gate length which are smaller than those of a gate oxide film of each n-type MOSFET in the peripheral circuits.