Logic edge timing generation

An edge generation circuit phase delays pulses of a first signal propagated on an integrated circuit. The edge generation circuit includes a first variable delay circuit located on the integrated circuit, a delay line located off the integrated circuit and a second variable delay circuit located on the integrated circuit. The first variable delay circuit receives the first signal and produces a second signal which is in phase with the first signal. The delay line receives the second signal and produces a third signal. The third signal is delayed in phase from the second by a precise amount. The second variable delay circuit receives the third signal from the delay line and produces a fourth signal. The fourth signal is in phase with the third signal.