Charge amplifying trench memory cell

A gain memory cell circuit includes a storage capacitor connected between a storage node and ground, a write word line, a read word line, a second capacitor capactively coupling the read word line to the storage node, a read transistor having its source/drain path coupled between the bit line and gr...

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Bibliographische Detailangaben
Hauptverfasser: KENNEY, DONALD M
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A gain memory cell circuit includes a storage capacitor connected between a storage node and ground, a write word line, a read word line, a second capacitor capactively coupling the read word line to the storage node, a read transistor having its source/drain path coupled between the bit line and ground and having its gate coupled to the storage node, and a write transistor having its source/drain path coupled between the storage node and bit line and a control electrode connected to the write word line.