Multi-layer circuitry

Multi-layer circuitry incorporating electronic elements is disclosed. The circuitry comprises a plurality of layers including a metal or alloy substrate formed with a recess on one surface. An electronic element is positioned within the recess and a second electronic element is positioned on the surface. Also, a first dielectric material layer is disposed on the surface. Further, a first layered conductive circuit pattern overlies the first dielectric material layer so as to provide circuitry over a substantial portion of the substrate. The first circuit pattern is electrically connected to the first electronic element. The first circuit pattern also has a cavity therein for receiving the second electronic element. A second layered conductive pattern overlies at least a portion of the first layered conductive circuit pattern and the second electronic element and is electrically connected to the second electronic element. A second dielectric material layer is disposed between the first and second layered conductive circuit patterns so that these circuit patterns are bonded to and isolated from each other.