Fault-tolerant multiprocessor system

Fault-tolerant multiprocessor system

In a multiprocessor system interconnected by a bus structure that provides communication and information transfers between the processor modules of the system, each processor broadcasts a central message to all the other processors of the system on a periodic basis. A processor module not receiving...

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Bibliographische Detailangaben
Hauptverfasser: HAYASHI, STEVEN J, DESPOTAKIS, JOHN A, GREIG, DAVID A, DAVIDOW, WILLIAM H, BIXLER, RICHARD M, TREYBIG, JAMES G, KATZMAN, JAMES A, BARTLETT, JOEL F, GRAZIANO, PETER J, WIERENGA, STEVEN W, GREEN, MICHAEL D, MACKIE, DAVID R, MCEVOY, DENNIS L
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:In a multiprocessor system interconnected by a bus structure that provides communication and information transfers between the processor modules of the system, each processor broadcasts a central message to all the other processors of the system on a periodic basis. A processor module not receiving the control message from a sending processor module will assume the sending processor module has failed, and operate to take over the task of the failed processor module.