Processor controlled modifying of tabled input/output priority

An apparatus determines the order of data communication between a plurality of peripheral devices that wish to do so and a central processor unit. Determination is made according to one of a number of selectable priority schedules. The apparatus is modifiable by programmed control so that certain of...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: FULLER, WILLIAM T
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:An apparatus determines the order of data communication between a plurality of peripheral devices that wish to do so and a central processor unit. Determination is made according to one of a number of selectable priority schedules. The apparatus is modifiable by programmed control so that certain of the peripheral devices can have their priorities reconfigured depending upon changing circumstances.