Apparatus and method for capacitor coupled complementary buffering

A semiconductor buffer circuit and buffering method for driving capacitive loads that enhances the current sinking and sourcing drive characteristics at times when the input signal is changing. Two transistors (12,14) are used, a source follower transistor (12) and a current source pull-down transistor (14), with an input signal (Vin) applied to the control input of the source follower transistor (12). The complement (Vin) of the input signal (Vin) is capacitively coupled to the control input of the current source pull-down transistor (14). As a result, changes in the input voltage increase or decrease the conductivity of the current source pull-down transistor (14), thereby allowing the capacitive load (13) to be charged and discharged more efficiently.