Digital signal receiver

A digital signal receiver comprises a plurality of frequency characteristic correcting circuits (14, 15, 16) for correcting a group delay characteristic which is different for each of the respective broadcasting stations and a location for reception thereof. A station selecting integrated circuit (18) provides a switching signal corresponding to a selected station position to render non-conductive any of transistors (Q1, Q2, Q3) for selecting the respective frequency characteristic correcting circuits through switches (SW1 to SW8) for determining which of the plurality of frequency characteristic correcting circuits is to be selected. The corresponding frequency characteristic correcting circuit is enabled in response to non-conduction of any one of the transistors for connection to the output from an intermediate frequency circuit (2) including a detecting circuit for demodulating the digital signal. As a result, the group delay characteristic which is different for each of the broadcasting stations and a location for reception thereof can be corrected each time an electric wave from each of the broadcasting stations is selected by means of the tuner.