Programmable CMOS circuit for user defined chip enable and output enable

A circuit constructed in accordance with this invention is described which includes a programmable chip enable-output enable buffer (11-X). The chip enable-output enable buffer may be programmed to provide a chip enable function in response to a logical 1 or logical 0 chip enable input signal, an output enable function in response to a logical 1 or logical 0 output enable input signal, or an active powered chip regardless of the provided input signal. The chip enable-output enable buffer is programmed by "programming" selected transistors in the buffer. A P channel transistor (40, 60) is programmed by causing its source to be connected to its drain. An N channel transistor (50, 60) is programmed by causing its source and drain to be disconnected. In one embodiment, the programming is accomplished in the preferred embodiment by either a diffusion process or an ion implantation process.