Switching control for multiple stage time division switch

Switching control for multiple stage time division switch

A multi-stage time division switch interconnects processors communicating over one or more channels on time division lines. One of the processors is designated as a common processor to provide the switching "mapping" information for the various stages of the switch sending the switching in...

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Bibliographische Detailangaben
Hauptverfasser: GRUST, DONALD B, POPPE, DAVID A, WURTH, RICHARD T, BANTON, RANDALL G, JOHNSON, DAVID R, KNEUER, JOSEPH G, LIN, KUANG-SHIN, MCDONALD, HENRY S, REEDY, JEFFREY W, BHATIA, RAJIV
Format: Patent
Sprache:eng
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
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Beschreibung
Zusammenfassung:A multi-stage time division switch interconnects processors communicating over one or more channels on time division lines. One of the processors is designated as a common processor to provide the switching "mapping" information for the various stages of the switch sending the switching information to the memory and logic of each switched stage over dedicated channels which include channels on the time division line emanating from the common processor and time division channels which pass through several switches until the memory of the applicable switch is accessed.