CPU with multi-stage mode register for defining CPU operating environment including charging its communications protocol
A central processor unit (CPU) is capable of being connected in data processing systems having diverse logical operating characteristics. The CPU contains an operating mode register that has stages that identify various logical operating conditions in the data processing system, and modify the opera...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Schreiben Sie den ersten Kommentar!