CPU with multi-stage mode register for defining CPU operating environment including charging its communications protocol

CPU with multi-stage mode register for defining CPU operating environment including charging its communications protocol

A central processor unit (CPU) is capable of being connected in data processing systems having diverse logical operating characteristics. The CPU contains an operating mode register that has stages that identify various logical operating conditions in the data processing system, and modify the opera...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: OLSEN, RICHARD E, BAKER, DWIGHT C
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A central processor unit (CPU) is capable of being connected in data processing systems having diverse logical operating characteristics. The CPU contains an operating mode register that has stages that identify various logical operating conditions in the data processing system, and modify the operation of the central processor unit in accordance therewith.