Multiple bit output dynamic random-access memory

Multiple bit output dynamic random-access memory

A dynamic MOS random-access memory is described which includes a circuit for permitting checking of the on chip refresh counter. The memory also includes a refresh generator, the frequency of which automatically varies to compensate for temperature variations. Other innovations include an arbitratio...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SPADERNA, DIETER W, FLANNAGAN, STEPHEN T, REESE, EDMUND A
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:A dynamic MOS random-access memory is described which includes a circuit for permitting checking of the on chip refresh counter. The memory also includes a refresh generator, the frequency of which automatically varies to compensate for temperature variations. Other innovations include an arbitration circuit, a hidden refresh function and unique accessing of redundant lines.