Arbitration scheme for a multiported shared functional device for use in multiprocessing systems

An arbitration network for use in a data multiprocessing system that includes a functional unit, such as a memory module, that is shared by several requestor devices, such as data processors, wherein access is granted to the shared functional unit through a common data bus on a rotating priority basis and wherein the arbitration cycle of the functional unit for determining priorities of the requestor devices is performed near the end of each operational cycle of the functional unit so that the next requestor device initiates its operational cycle immediately succeeding a current operational cycle then transacting thereby to minimize idle bus periods which would otherwise occur during arbitration cycle sequencing. When the bus is idle and only one request for access is made, the arbitration network foregoes the complete arbitration cycle and issues the grant to the requesting device thereby providing an earlier initiation of the data transfer cycle of the functional unit.