On-chip refresh for dynamic memory
A semiconductor device comprises an array of rows and columns of dynamic-type memory cells with on-chip refresh circuitry including an address counter and a multiplexer to insert the refresh address when a system command is received indicating a refresh cycle. The refresh address counter is incremen...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A semiconductor device comprises an array of rows and columns of dynamic-type memory cells with on-chip refresh circuitry including an address counter and a multiplexer to insert the refresh address when a system command is received indicating a refresh cycle. The refresh address counter is incremented after each refresh cycle. If a refresh command is not present, the device is accessed in the usual manner. |
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