Transparent tri state latch

Tri state logic gates in series are disclosed for permitting the latching of information from a first circuit by enabling a second circuit at the time information from the first circuit becomes valid. At the start of the memory cycle the second circuit is disabled and the first circuit is enabled. T...

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Bibliographische Detailangaben
Hauptverfasser: FISHER, EDWIN P
Format: Patent
Sprache:eng
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