Microprocessor controlled CRT display system

A display system is disclosed wherein a refresh memory is divided into a plurality of blocks of bytes so that a micro-processor can access the blocks byte by byte while display data of the plurality of blocks are assembled by word so that the display data are accessed word by word. The access by the...

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Hauptverfasser: HAMADA, NAGAHARU
Format: Patent
Sprache:eng
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Zusammenfassung:A display system is disclosed wherein a refresh memory is divided into a plurality of blocks of bytes so that a micro-processor can access the blocks byte by byte while display data of the plurality of blocks are assembled by word so that the display data are accessed word by word. The access by the micro-processor and the access for display are time-shared at a timing of one half of one character display to avoid wait time for the accessing.