Junction gated field effect transistor

A junction gated field effect transistor having a substrate providing a drain region of low impurity concentration, a mosaic shaped gate region of high impurity concentration formed on the drain region, a corresponding mosaic shaped insulating layer overlying said mosaic shaped gate region but havin...

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Hauptverfasser: ISHITANI, AKIYASU
Format: Patent
Sprache:eng
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Zusammenfassung:A junction gated field effect transistor having a substrate providing a drain region of low impurity concentration, a mosaic shaped gate region of high impurity concentration formed on the drain region, a corresponding mosaic shaped insulating layer overlying said mosaic shaped gate region but having windows therein smaller than the windows of the gate region, the windows of the insulating layer being aligned with the windows of the gate region, a gate electrode connected to said mosaic shaped gate region, a plurality of source regions of high impurity concentration formed on the substrate in the openings of the mesh forming the insulating layer, and a conductive plate source electrode overlying said insulating layer and in contact with said source regions.