Low speed phaselock speed control system

A motor speed control system for an electronically commutated brushless D.C. motor is provided which includes a phaselock loop with bi-directional torque control for locking the frequency output of a high density encoder, responsive to actual speed conditions, to a reference frequency signal, corresponding to the desired speed. The system includes a phase comparator, which produces an output in accordance with the difference in phase between the reference and encoder frequency signals, and an integrator-digital-to-analog converter unit, which converts the comparator output into an analog error signal voltage. Compensation circuitry, including a biasing means therein, is provided to convert the analog error signal voltage to a bi-directional error signal voltage which is utilized by an absolute value amplifier, rotational decoder, power amplifier-commutators, and an arrangement of commutation circuitry, forming an integral part of the phaselock loop and including position decoders, switches, and rotor position sensors, all cooperating to control the acceleration and deceleration of the motor to achieve symmetrical bi-directional torque control thereof. The phase comparator and integrator-digital-to-analog converter unit cooperate with a simplified overspeed control circuit to derive a signal which is utilized in the system to get the motor at its desired speed and to thereafter maintain it at that speed.