INTEGRATED THRESHOLD MNOS MEMORY WITH DECODER AND OPERATING SEQUENCE

A digital memory system employing a rectangular array of known MNOS variable threshold insulated gate field effect transistor memory cells is actuated by auxiliary circuits which provide a four-step operating sequence. The memory cells are arranged in word rows in which the gate electrodes of all me...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	WEGENER H,US
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!