SYNCHRONIZED STATIC MOSFET LATCH

1414217 Bistable circuits INTERNATIONAL BUSINESS MACHINES CORP 31 Aug 1973 [28 Sept 1972] 41108/73 Heading H3T A two-phase latch circuit comprises a capacitive input stage 31-35 including an FET circuit 31 or 32 responsive to clock signals # 1 of a first phase for storing at 34, 35 a set or reset in...

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1. Verfasser:	SOUTHWORTH R,US
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRONIC CIRCUITRY ELECTRICITY PULSE TECHNIQUE
Online-Zugang:	Volltext bestellen
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