RAPID RECOVERY CIRCUIT FOR CAPACITIVELY LOADED BIT LINES

There is disclosed a circuit for achieving rapid recovery of the capacitively loaded bit lines of a semiconductor memory. Transistors are provided for driving the lines following a write cycle. The active driving of the bit lines forces them to the same potential so that a read cycle may begin very...

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Bibliographische Detailangaben
Hauptverfasser: BRYANT R,US, TU G,US, ALEXANDER S,US, LIPP R,US
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:There is disclosed a circuit for achieving rapid recovery of the capacitively loaded bit lines of a semiconductor memory. Transistors are provided for driving the lines following a write cycle. The active driving of the bit lines forces them to the same potential so that a read cycle may begin very soon after the termination of a write cycle.