COHERENT SAMPLED READOUT CIRCUIT AND SIGNAL PROCESSOR FOR A CHARGE COUPLED DEVICE ARRAY

1413036 Transistor gating circuits; television WESTINGHOUSE ELECTRIC CORP 22 Oct 1973 [20 Oct 1972] 49010/73 Headings H3T and H4F A sample and hold circuit, Fig. 5, is used to remove noise and switching transients in the output of a CCD apparatus. This apparatus may be a photo-sensitive imaging device (10, Fig. 1, not shown) the charge packets therein being transferred by control signal #T into a two-phase parallel-to-serial converting CCD shift register (14). Charge packets from the final stage of the shift register are fed by a switch 16 controlled by a signal #n into a minority carrier detector circuit comprising a diode 18. The switch is formed by an electrode (34) overlying the insulation layer (28, Fig. 2, not shown) and the diode is formed by a p-diffusion (40) in the substrate (26). The read out circuit Fig. 5, includes a capacitance CN which is first charged by FET 20 to -VR and at the end of this RESET period (Fig. 6, not shown) retains a voltage representing Nyquist noise level. Then (READ RESET) a switch 76 in the sample and hold circuit closes to cause a capacitor 74 to charge to this noise voltage (Vg). Thirdly, in response to #M the diode 18 charges CN in #M, time to a level representing the detected charge packet (black or white) this level also including the noise component, the switch 76 now being open again. Finally a switch 92 passes the net charge on C74. which represents the charge packet minus the noise, to a capacitor 94. The voltage on C94 is fed out by an amplifier 98.