ERROR DETECTION AND CORRECTION FOR DATA PROCESSING SYSTEMS

An error detecting and correcting system is provided for a unit having an essentially subordinate structure, such as a function unit of a computer. Correct output signals are assumed for the unit and, accordingly, check bits are formed as a function of the output signals of the unit. These bits are stored with a control word associated with each operation. As the operation is being executed, the check bits are regenerated from the output signals of the function unit and are subsequently compared with the correct check bits previously stored. Non-concurrence of the check bits indicates that an error may have occurred in the unit.