READ MOSTLY ASSOCIATIVE MEMORY CELL FOR UNIVERSAL LOGIC

A universal logic system is disclosed wherein arbitrary Boolean functions can be generated by cascading AND and OR logic. The logic system comprises an array of read mostly associative memory cells for storing information determinative of the logic produced. Information is stored in the form of charge, avalanche injected into the gate electrode of floating gate field effect transistors. The AND and OR functions are performed by associative search and read operations respectively. Erasure is performed by avalanche injection from the floating gate to the substrate of the transistor. Voltage variable capacitance elements are included to selectively enhance voltages within the cell.