DISPLAY BUFFER

A display buffer is provided with a cyclic memory. Means is provided for writing data into the memory in successive regions and means is provided for reading data out in sequence. Counter means is provided to count the number of messages written into memory and the number of messages read out of memory, and inhibit means is provided to inhibit the write means if the memory becomes fully loaded. The read-out rate may be significantly different from the write-in rate so that the display buffer can accept data messages at a rate equal to computer assimilation and can display messages at a rate compatable to display rate generation.