SILICON GATE FET-NIOBIUM OXIDE DIODE-MEMORY CELL

1340830 Semi-conductor memory devices INTERNATIONAL BUSINESS MACHINES CORP 1 Dec 1972 [20 Dec 1971] 55489/72 Heading H1K A memory device consists of a silicon gated N-channel enhancement mode IGFET with a bi-stable switching diode consisting of a layer of niobium oxide sandwiched between layers of niobium and bismuth disposed on and wholly within the periphery of its drain region. A matrix of devices may be formed on a P-type silicon wafer by oxidizing its surface and etching the oxide to expose the device sites, depositing polycrystalline silicon overall and pattern etching it to delineate the gates and strips interconnecting them in rows and to expose the P type silicon at the source and drain sites, after which the source and drain regions are formed and the remaining polycrystalline silicon doped by donor diffusion. Electrodes are formed on these regions by alloying platinum to them, after which niobium is deposited on the drain electrode and its surface wet anodized and then coated with bismuth. The matrix is completed by provision of pairs of aluminium strips interconnecting the source and bismuth electrodes respectively in columns. Information is stored by applying word address signals to the silicon row conductors and appropriately poled bit writing signals between pairs of aluminium strips to switch the diode to its high or low resistance state. It is read out by gating the appropriate IGFET on and sensing whether or not a small voltage applied across the series circuit of the source-drain path and diode produces a current.