REVERSIBLE COUNTER

1,201,328. Electronic counters. AMERICAN OPTICAL CORP. 7 Dec., 1967 [29 Dec., 1966], No. 55804/67. Heading G4A. A quinary counter is arranged so as to have three stages non-conducting and two conducting, each input electrode being controlled by the output electrodes of one adjacent and two non- adjacent stages and through a capacitor and diode from a common input signal bus. Each of the stages A-E comprises a transistor 16 the base of which is fed through resistors 42, 44 from two out of five buses 40A-40E fed by the outputs of the several stages. Each base is supplied through diode 28 and capacitor 30 by forward-driving pulses from 29 or through 32, 34 by reverse pulses from 31. The diodecapacitor junction is connected by resistor 36 or 38, respectively, to the preceding or following bus 40, as the case may be. The potentials are such that in a state of rest two adjacent stages in the ring are on, e.g. C, D. The related buses are therefore at ground and the others at + 10V. The bases of A-E are then at -6À6, 0, +0À7, +0À7, 0. A negative-going pulse on forward line 29 drops the potential on capacitor 30C sharply from + 10V to ground so that 16C cuts off and collector bus 40C rises to +10V, so that 16E conducts. Read-out.-The buses 40 are connected in pairs arranged as OR gates to transistors 50A- 50E, only one of which is therefore non-conducting to indicate on its output terminal T, 1-4. Transistors 50A and 50E combine with forward or reverse counting diode 72 or 78 to carry to bi-stable 14 with output at 102-1 or 102-2 of 5 or 5. Forward or reverse decimal carry is effected at 104-1 or 104-2.