MULTI-WAFER STACKED CMOS IMAGE SENSOR STRUCTURE

MULTI-WAFER STACKED CMOS IMAGE SENSOR STRUCTURE

A stacked CMOS image sensor (CIS) structure is provided. The stacked CIS structure comprises a first die, a second die and a third die. The first die comprises a photodiode, a transfer gate, a selective conversion gain (SCG) switch, a reset switch, a floating node diffusion capacitor and a SCG diffu...

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Bibliographische Detailangaben
Hauptverfasser: CHEN, SHENGAU, YANG, MING-HSIEN, LEE, KUONG, CHOU, CHUN-HAO, CHENG, CHUNG-LIANG, WEI, CHIA-YU
Format: Patent
Sprache:eng
Schlagworte:
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PICTORIAL COMMUNICATION, e.g. TELEVISION
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Beschreibung
Zusammenfassung:A stacked CMOS image sensor (CIS) structure is provided. The stacked CIS structure comprises a first die, a second die and a third die. The first die comprises a photodiode, a transfer gate, a selective conversion gain (SCG) switch, a reset switch, a floating node diffusion capacitor and a SCG diffusion capacitor. The second die comprises a source follower transistor and a row select switch. The third die comprises an image sensing circuit electrically connected to the third floating node.