MEMORY ACCESS FOR MULTI-CHIPLET SYSTEM-IN-PACKAGE

MEMORY ACCESS FOR MULTI-CHIPLET SYSTEM-IN-PACKAGE

Systems, apparatus, articles of manufacture, and methods are disclosed for memory access for multi-chiplet system-in-package. Example instructions cause at least one circuit in a system-in-package (SiP) to reserve a region in a memory associated with the SiP for exclusive use by a first die of the S...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Sood, Kapil, Schmole, Filip, Lakkakula, Naveen, Fleming, Patrick, Liu, Yen-Cheng, Beker, Vladimir, Mosur, Lokpraveen Bhupathy, Shacham, Liron
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:Systems, apparatus, articles of manufacture, and methods are disclosed for memory access for multi-chiplet system-in-package. Example instructions cause at least one circuit in a system-in-package (SiP) to reserve a region in a memory associated with the SiP for exclusive use by a first die of the SiP apart from a second die of the SiP. For example, the memory is for use by multiple, respective, dies of the SiP.