MACHINE LEARNING FOR NETLIST DESIGN

Certain aspects of the present disclosure provide techniques and apparatus for evaluating electronic circuit designs. A directed graph representing a netlist design for an electrical circuit is accessed, the netlist design comprising a plurality of electronic components and a plurality of connection...

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Bibliographische Detailangaben
Hauptverfasser: CAREY, Ryan Michael, KOSTAS, Lindsey Makana, BOURON, Bernard, HSU, Chin-Wei, SARAR, Gokce, DEFFERRARD, Michael, ATAN, Onur, BALLANI, Arnav, KOTTURI, Chandram, SARODE, Akshay Sanjay, LEPERT, Romain
Format: Patent
Sprache:eng
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Zusammenfassung:Certain aspects of the present disclosure provide techniques and apparatus for evaluating electronic circuit designs. A directed graph representing a netlist design for an electrical circuit is accessed, the netlist design comprising a plurality of electronic components and a plurality of connections among the plurality of electronic components. A node in the directed graph is selected, the node corresponding to a register that receives input from one or more of the plurality of electronic components in the netlist design. A subgraph is generated for the node, based on the directed graph, comprising identifying a connectivity cone ending at the first register. A functional embedding is generated for the subgraph based on a trained encoder machine learning model. A predicted performance characteristic of the netlist design is generated based at least in part on the functional embedding.