ECC POWER CONSUMPTION OPTIMIZATION IN MEMORIES
The present disclosure relates to a memory device comprising an array including a plurality of memory cells and an operating unit, the operating unit comprising an encoding unit configured to store user data in a plurality of memory cells of the memory array and to store parity data associated with...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | The present disclosure relates to a memory device comprising an array including a plurality of memory cells and an operating unit, the operating unit comprising an encoding unit configured to store user data in a plurality of memory cells of the memory array and to store parity data associated with the user data in a number of parity cells of the memory array, the operating unit further comprising a decoding unit in turn comprising a syndrome generating unit configured to calculate an ECC syndrome from the stored user data and parity data, wherein the syndrome generating unit comprises a plurality of circuit portions, each circuit portion being configured to calculate a respective syndrome portion of the ECC syndrome. The operating unit is configured to activate a first circuit portion of the syndrome generating unit for calculating a first syndrome portion, and, based on the calculated first syndrome portion, decide whether to activate or not to activate a second circuit portion for the calculation of a second syndrome portion. Related methods and systems are also herein disclosed. |
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