Hardware Architecture of Packet Cache Eviction Engine
Aspects of the disclosure are directed to a packet cache eviction engine for reliable transport protocols of a network. The packet cache eviction engine can manage on-chip cache occupancy by evicting lower priority packets to off-chip memory and ensuring that higher priority packets are kept on-chip...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | Aspects of the disclosure are directed to a packet cache eviction engine for reliable transport protocols of a network. The packet cache eviction engine can manage on-chip cache occupancy by evicting lower priority packets to off-chip memory and ensuring that higher priority packets are kept on-chip to achieve higher performance and lower latency in processing packets in the network. |
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