AUTO-FOCUS ENGINE ARCHITECTURE FOR IMAGE SIGNAL PROCESSOR

Embodiments relate to image signal processors (ISP) that include binner circuits that down-sample an input image. An input image may include a plurality of pixels. The output image of the binner circuit may include a reduced number of pixels. The binner circuit may include a plurality of different o...

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Bibliographische Detailangaben
Hauptverfasser:	LIN, Sheng, Pope, David R, Silverstein, D. Amnon
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY IMAGE DATA PROCESSING OR GENERATION, IN GENERAL PHYSICS PICTORIAL COMMUNICATION, e.g. TELEVISION
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Beschreibung
Zusammenfassung:	Embodiments relate to image signal processors (ISP) that include binner circuits that down-sample an input image. An input image may include a plurality of pixels. The output image of the binner circuit may include a reduced number of pixels. The binner circuit may include a plurality of different operation modes. In a bin mode, the binner circuit may blend a subset of input pixel values to generate an output pixel quad. In a skip mode, the binner circuit may select one of the input pixel values as the output pixel pixel. The selection may be performed randomly to avoid aliasing. In a luminance mode, the binner circuit may take a weighted average of a subset of pixel values having different colors. In a color value mode, the binner circuit may select one of the colors in a subset of pixel values as an output pixel value.