BIAS CIRCUIT

A bias circuit for a RF amplifier is described. The bias circuit includes a first transistor and a second transistor configured as a first current mirror. A first current source is arranged between a supply node and the first transistor first terminal. An output of the bias circuit is coupled to the second transistor second terminal. A second current mirror coupled to the first current mirror and the bias circuit output. The bias circuit includes a first resistor coupled between a first transistor control terminal and a second transistor control terminal and a variable capacitor coupled between the second transistor control terminal and a ground.