SYSTEM FOR DETECTING FAULT INJECTION ATTACKS

An integrated circuit (IC) that includes an always-on buffer and a power line is provided. The power line is routed on the IC such that a first end of the power line is at a first global supply voltage and a second end of the power line is at a second global supply voltage that is less than the first global supply voltage. The always-on buffer receives an input bit and the second global supply voltage and generates an output bit that has a same logic state as that of the input bit. During a fault injection attack, the second global supply voltage is altered such that the logic state of the output bit toggles while the logic state of the input bit remains same. Based on the toggling of the logic state of the output bit, the fault injection attack on the IC is detected.