METHOD AND SYSTEM OF DESIGNING INTEGRATED CIRCUIT

METHOD AND SYSTEM OF DESIGNING INTEGRATED CIRCUIT

An example embodiment provides a design method of an integrated circuit, including: placing a through-via; determining a keep-out zone around the through-via based on a saturated current variation rate according to a distance from the through-via; placing standard cells; determining a cell placed wi...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Hong, Yongjin, Lim, Mijeong, Kim, Ki-Ok
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:An example embodiment provides a design method of an integrated circuit, including: placing a through-via; determining a keep-out zone around the through-via based on a saturated current variation rate according to a distance from the through-via; placing standard cells; determining a cell placed within the keep out zone among the cells; and setting a timing margin based on the distance from the through-via to the cell.