Alleviating Memory-Access Congestion in Network Devices
A network device includes one or more ports, processing circuitry, and a memory-network congestion controller. The one or more ports are to connect to a network. The processing circuitry is to run a plurality of processing tasks that access a shared memory, one or more of the processing tasks includ...
Gespeichert in:
Hauptverfasser: | , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A network device includes one or more ports, processing circuitry, and a memory-network congestion controller. The one or more ports are to connect to a network. The processing circuitry is to run a plurality of processing tasks that access a shared memory, one or more of the processing tasks including communicating one or more packet flows over the network. The memory-network congestion controller is to identify a memory-access congestion, which occurs in accessing the shared memory by one or more of the processing tasks, and to alleviate the memory-access congestion by causing a reduction in a communication rate of at least one of the packet flows. |
---|