SEMICONDUCTOR PACKAGES

A semiconductor includes a lower structure, an upper structure on the lower structure, and a connection pattern between the lower structure and the upper structure. The connection pattern is configured to electrically connect the lower structure and the upper structure to each other. The lower struc...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: HYUN, Young Hoon, KONG, Yung Cheol, SHIM, Jong Bo, KIM, Ji Hwang, LEE, Jang Woo
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A semiconductor includes a lower structure, an upper structure on the lower structure, and a connection pattern between the lower structure and the upper structure. The connection pattern is configured to electrically connect the lower structure and the upper structure to each other. The lower structure includes a lower base and a first lower chip on the lower base. The first lower chip includes a chip bonding pad, a pad structure, and a heat sink structure. The connection pattern is connected to the upper structure and extends away from the upper structure to be connected to the pad structure. The pad structure has a thickness greater than a thickness of the chip bonding pad. At least a portion of the heat sink structure is at a same height level as at least a portion of the pad structure.